January 11 2018
Nanotechnology,Research & Development

Capital Region Researchers Scored 1,000+ Semiconductor Patents in 2016

Capital Region inventors had a hand in more than 1,000 semiconductor device-related patents issued in 2016, and they played a lead role in more than three quarters of them. While the bulk of those patents were assigned to GLOBALFOUNDRIES and IBM, several other semiconductor and electronics companies with R&D operations, such as those at SUNY Polytechnic Institute, significantly ramped up their patent generation within this technology class, according to a Center for Economic Growth review of patents listed in the U.S. Patent and Trademark Office (PTO) Patent Full-Text and Image Database.

The Rainmakers

Capital Region inventors were listed on 1,095 patents issued in 2016 in the Cooperative Patent Classification (CPC) HO1L class, which primarily covers semiconductor devices. Out of those patents, 852 had local first-named inventors. GLOBALFOUNDRIES had 426 patents with first-named local inventors and IBM had 278. In comparison, the entire state of Texas had only 482 semiconductor-device related patents with local first-named inventors in 2016.

Other Semiconductor Device Innovation Drivers

In 2016, 18 other companies and three institutions generated 138 semiconductor device-related patents with Capital Region first-named inventors. That was up 59 percent from the 87 such patents that those 21 assignees received in 2015. Companies that in 2016 received more than one semiconductor device-related patent with a local first-named inventor included General Electric, Tokyo Electron, First Solar, Sensor Electronic Technology, Rensselaer Polytechnic Institute (RPI), Crystal IS, the Commissariat a l’energie atomique et aux energies alternative (CEA) and Texas Instruments. With patent issuances taking one to three years after their applications, STMicroelectronics also received several with local first-named inventors.

NYS Patent Performance

In 2016, 1,746 semiconductor device-related patents with New York State first-named inventors were issued and assigned to 125 companies and institutions. The Capital Region accounted for the greatest share of that statewide total (48.8 percent). The Mid-Hudson region ranked second (43.5 percent), followed by the Finger Lakes (2.7 percent) and Southern Tier (2.1 percent). The below table details those regions’ semiconductor device-related patent outputs and top patent generators.

Capital Region Semiconductor Assets

A vast and robust public and private R&D infrastructure is what has enabled the Capital Region to emerge as a world leader in semiconductor device innovation. In 2016, SUNY Polytechnic alone spent $312.2 million on engineering. That also made SUNY Poly the nation’s fourth biggest engineering R&D spender. Adding to that was the $61.5 million that Rensselaer Polytechnic Institute (RPI) spent in 2016 on engineering R&D, according to a CEG analysis of National Center for Science and Engineering Statistics. (NCSES). As of 2015, the region also housed 711,000 square feet of academic engineering R&D space – the seventh greatest amount in the nation.

CEG Semiconductor Industry Support

CEG’s support of the Capital Region’s semiconductor industry dates back to the late 1990s, when the organization began marketing the area to chip companies worldwide and later helped lay the groundwork for a local chip fab. That tradition continues with the following:

In 2017, CEG represented the Capital Region at six semiconductor/nanotechnology conferences worldwide.

For 16 consecutive years – including last November – CEG and NY Loves Nano have sponsored the Semiconductor Industry Association’s annual awards dinner in California.

Continuing its tradition of hosting the semiconductor industry in the Capital Region, CEG last June organized the 87/90 Semiconductor Summit at the Saratoga Springs City Center.

To showcase not only the region’s semiconductor assets, such as the SUNY Polytechnic Institute and Rensselaer Polytechnic Institute (RPI) but also those relating to autonomous operations, health applications, smart cities and advanced electronics, CEG last October organized a three-day Business Connection Forum with Silicon Europe and support from North American partners in Albany, N.Y. At the Business Connection Forum, CEG and Silicon Europe entered a memorandum of understanding (MOU) in which CEG and Silicon Europe agreed to, among other things, “facilitate collaboration and partnerships with businesses, academic institutions, government, and workforce development partners to build a skilled workforce pipeline for industries.”

About the Study

CEG’s regional patent counts are for the first-named inventors and first-named assignees. Traditionally, the PTO has reported statistics for semiconductor device manufacturing (process) patents classified under the U.S. Patent Classification System (USPCS). The PTO tallied the number of these patents annually issued within metropolitan statistical areas (MSA), based on the number of first-named inventors living in them. While the order of inventors listed does not have any legal implications, the person who made the most contributions to an invention are customarily named first, though corporations may have different listing rules. The PTO in 2015 completed its transition from the USPCS to the CPC, upon which CEG’s counts are based. The CPC has a broader class (H01L) for semiconductor devices than the USPCS. This CPC class includes the following:

electric solid state devices which are not covered by any other subclass and details thereof, and includes: semiconductor devices adapted for rectifying, amplifying, oscillating or switching; semiconductor devices sensitive to radiation; electric solid state devices using thermoelectric, superconductive, piezo-electric, electrostrictive, magnetostrictive, galvano-magnetic or bulk negative resistance effects and integrated circuit devices; photoresistors, magnetic field dependent resistors, field effect resistors, capacitors with potential-jump barrier, resistors with potential-jump barrier or surface barrier, incoherent light emitting diodes and thin-film or thick-film circuits; processes and apparatus adapted for the manufacture or treatment of such devices, except where such processes relate to single-step processes for which provision exists elsewhere.

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